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Lecturer(s)
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Course content
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1. Introduction to digital systems, number systems, combinational and sequential circuits 2. Introduction to programmable logic circuits and description of FPGA architecture 3. Introduction to the development kit and environment, logic functions 4. Creating a first design for an FPGA, adder using a flowchart 5. Introduction to VHDL programming language, adder using VHDL 6. Extending knowledge of VHDL 7. Possibilities of debugging and using IP components, application of PLL phase closure 8. Harmonic signal generation using NCO, signal filtering using FIR filter 9. Use of analog-to-digital and digital-to-analog converters for signal processing and generation in FPGAs 10. Simulation of logic circuits 11. Independent work on semester work and consultation 12. Independent work on term paper and tutorials
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Learning activities and teaching methods
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unspecified, Monologic (reading, lecture, briefing), Work with text (with textbook, with book), Methods of individual activities, Skills training, Laboratory work
- Home preparation for classes
- 40 hours per semester
- Preparation for an exam
- 45 hours per semester
- Contact teaching
- 35 hours per semester
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Learning outcomes
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The aim of the course is to introduce students to Field Programmable Gate Arrays (FPGAs). The first half of the semester is devoted to theoretical background, logic circuits, and familiarization with the development kit and software environment. The second part of the semester mainly emphasizes practical application design in the area of signal processing in the MHz band. This is done using a development kit with AD and DA converters in cooperation with laboratory equipment (function generator, oscilloscope, spectrum analyzer). These exercises will allow the understanding and deepening of the acquired theoretical knowledge in practical implementations.
The student will gain a basic overview of the possibilities of using and designing applications for programmable gate arrays in VHDL.
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Prerequisites
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unspecified
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Assessment methods and criteria
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Oral examination, Written examination, Home assignment evaluation, Student performance assessment, Self project defence
During the semester and in the final exam, the student must demonstrate an understanding of the solved problems in the scope of the studied subject.
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Recommended literature
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Kolouch, J. Programovatelné logické obvody a návrh jejich aplikací v jazycích ABEL a VHDL : počítačové cvičení.. Brno, 2002. ISBN 80-214-2197-5.
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Krejčí, T. Elektronická opora k předmětu: Programovatelná hradlová pole. 2024.
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Pang, A. and Membrey, P. Beginning FPGA: programming metal, your brain on hardware. Technology in action series. ISBN 978-1-4302-6247-3.
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Pinker, J. a Poupa, M. Číslicové systémy a jazyk VHDL. Praha: BEN ? technická literatura, 2006. ISBN 80-7300-198-5.
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U?nsalan, C. and Tar, B. Digital system design with FPGA: implementation using Verilog and VHDL. University, Bora Tar, The Ohio State University. New York: McGraw-Hill Education, 2017. ISBN 9781259837906.
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